PhD project, supervisor – Professor T X Mei
The implementation of complex control laws or computationally demanding simulation algorithms for real-time applications often requires the use of high performance processors and sometimes complex multi-processor architectures. In particular, hardware-in-the-loop approaches are now becoming increasingly popular in the development of control solutions for large and complex systems where full scale testing can be time consuming and/or expensive to carry out.
This innovative project is concerned with the development of a system-on-chip based accelerator for the real time simulation of complex and computationally intensive mathematical models. The main aim is to enable real time control implementation/testing in a hardware-in-loop environment, but it can also be used to speed up computer simulations in the study and design of complex systems. The design of a multi-core accelerator with six CPUs and two sets of floating point units is implemented on a single medium sized and low cost FPGA (field programmable gate arrays) device and is shown to deliver a far superior computation performance than high performance DSPs or the latest PCs.
The project is funded by UK ORS Award and Tetley & Lipton award.